Offer #2018.30

Hardware Accelerators for Embedded Security

University of Pisa

The problem/challenge

The Cybersecurity team of the Department of Information Engineering of University of Pisa features plurennial experience and skills in the development of Hardware accelerators for embedded systems. Starting from the analysis of the application security weakness and threats, the group can define the required design specifications and implement innovative crypto-cores or customize standard security modules to optimize the performances, in order to provide and enhance the confidentiality, the integrity and the authenticity of data, both on internal and external buses. After testing, validation and possibly Side-Channel Attacks resistance evaluation, synthesizable HDL files and documentation are delivered. AES based cipher suites, SHA functions and ECC field arithmetic accelerators are only a few examples of Cybersecurity team experience aiming at the realization of Hardware Secure Module (HSM) and Root-of-Trust zone for embedded systems.

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Date published07/09/2018StatusPending for reviewTechnology areasAeronautics and Space ApplicationsAutomotive ElectronicsCybersecurityHardware/Software CodesignIntegrated Circuit Design